Selective plating for junction delineation in silicon nanowires

Chad M Eichfeld; Carolyn Wood; Bangzhi Liu; Sarah M Eichfeld; Joan M Redwing; Suzanne E Mohney

doi:10.1021/nl0710248

Selective plating for junction delineation in silicon nanowires

Nano Lett. 2007 Sep;7(9):2642-4. doi: 10.1021/nl0710248. Epub 2007 Aug 16.

Authors

Chad M Eichfeld¹, Carolyn Wood, Bangzhi Liu, Sarah M Eichfeld, Joan M Redwing, Suzanne E Mohney

Affiliation

¹ Department of Materials Science and Engineering and Materials Research Institute, The Pennsylvania State University, Steidle Building, University Park, Pennsylvania 16802, USA.

PMID: 17696558
DOI: 10.1021/nl0710248

Abstract

The in situ growth of p-n junctions in silicon nanowires enables the fabrication of a variety of nanoscale electronic devices. We have developed a method for selective coating of Au onto n-type segments of silicon nanowire p-n junctions. Selective plating allows for quick verification of the position of p-n junctions along the nanowire using electron microscopy and allows for measurement of segment length.

Publication types

Research Support, U.S. Gov't, Non-P.H.S.

MeSH terms

Crystallization / methods*
Macromolecular Substances / chemistry
Materials Testing
Molecular Conformation
Nanostructures / chemistry*
Nanostructures / ultrastructure*
Nanotechnology / methods*
Particle Size
Semiconductors*
Silicon / chemistry*
Surface Properties

Substances

Macromolecular Substances
Silicon