Low interface state density and large capacitive memory window using RF sputtered NiO nanoparticles decorated MgZnO thin film

Mritunjay Kumar; Jay Chandra Dhar

doi:10.1038/s41598-025-86395-z

Low interface state density and large capacitive memory window using RF sputtered NiO nanoparticles decorated MgZnO thin film

Sci Rep. 2025 Jan 17;15(1):2322. doi: 10.1038/s41598-025-86395-z.

Authors

Mritunjay Kumar¹, Jay Chandra Dhar²

Affiliations

¹ Department of Electronics and Communication Engineering, National Institute of Technology Nagaland, Chumukedima, Nagaland, 797103, India.
² Department of Electronics and Communication Engineering, National Institute of Technology Nagaland, Chumukedima, Nagaland, 797103, India. [email protected].

PMID: 39833394
DOI: 10.1038/s41598-025-86395-z

Abstract

NiO nanoparticles (NPs) synthesized using glancing angle deposition (GLAD) technique over MgZnO thin film was used to design a novel memory device. The NiO NPs with average diameter ~ 9.5 nm was uniformly distributed over the MgZnO thin film surface. The MgZnO thin film/NiO NPs memory device when measured for the C-V hysteresis characteristics at varying sweep voltage demonstrated a charge trapping and de-trapping mechanism. Moreover, the device exhibited low interface states density (D_it) (1.45 × 10¹⁰ eV^{- 1} cm^{- 2}) at 1 MHz and large capacitive memory of ~ 6 V at ± 7 V. The large memory window was attributed to the better interface quality between MgZnO thin film and NiO NPs. Additionally, the device also exhibited good endurance over 1000 programme/erase cycles and longer time charge retention up to 2 × 10⁴ s. The improved performance of device and more charge accumulation capacity was primarily due to the large effective area and quantum confinement effect owing to NiO NPs. Further, on performing a resistive switching analysis, the device could show a good on-off ratio (R_HRS/R_LRS) of 1.24 × 10². Therefore, the proposed device structure can be a good option for future memory applications.