Simulation Program with Integrated Circuit Emphasis Compact Modeling of a Dual-Gate Positive-Feedback Field-Effect Transistor for Circuit Simulations

Min-Woo Kwon; Kyungchul Park; Myung-Hyun Baek; Sungmin Hwang; Tejin Jang; Byung-Gook Park

doi:10.1166/jnn.2019.17069

Simulation Program with Integrated Circuit Emphasis Compact Modeling of a Dual-Gate Positive-Feedback Field-Effect Transistor for Circuit Simulations

J Nanosci Nanotechnol. 2019 Oct 1;19(10):6417-6421. doi: 10.1166/jnn.2019.17069.

Authors

Min-Woo Kwon¹, Kyungchul Park¹, Myung-Hyun Baek¹, Sungmin Hwang¹, Tejin Jang¹, Byung-Gook Park¹

Affiliation

¹ Inter-University Semiconductor Research Center (ISRC) and Department of Electrical and Computer Engineering, Seoul National University, Seoul 08826, Republic of Korea.

PMID: 31026971
DOI: 10.1166/jnn.2019.17069

Abstract

In this work, we developed a SPICE compact model of a dual-gate positive-feedback field-effect transistor (FBFET) for circuit simulations by fitting the model to measurement results. We fabricated a FBFET and investigated the DC and transient characteristics. The fabricated FBFET has an extremely low sub-threshold slope and a low off current. The FBFET operates as a forward-biased PN diode after the device is turned on due to the positive feedback loop between the integrated charges and the potential barrier. When enough electrons are accumulated in the floating body, the potential barrier is lowered and the FBFET is turned on rapidly, and due to the integrated charges, the FBFET has memory characteristics which approximate hose of 1T-DRAM. Reflecting these electrical characteristics of the FBFET, we undertook SPICE modeling and obtained simulation results that were similar to the measurement characteristics. Finally, we implement a modified inverter with the FBFET connected in parallel with an n-type MOSFET (NMOS). Due to the superior sub-threshold characteristics of the FBFET, it effectively suppresses the sub-threshold currents.