Dynamics of analog logic-gate networks for machine learning

Itamar Shani; Liam Shaughnessy; John Rzasa; Alessandro Restelli; Brian R Hunt; Heidi Komkov; Daniel P Lathrop

doi:10.1063/1.5123753

Dynamics of analog logic-gate networks for machine learning

Chaos. 2019 Dec;29(12):123130. doi: 10.1063/1.5123753.

Authors

Itamar Shani¹, Liam Shaughnessy², John Rzasa³, Alessandro Restelli⁴, Brian R Hunt⁵, Heidi Komkov⁶, Daniel P Lathrop⁷

Affiliations

¹ Institute for Research in Electronics and Applied Physics, University of Maryland, College Park, Maryland 20742, USA.
² Institute for Advanced Computer Studies, University of Maryland, College Park, Maryland 20742, USA.
³ Department of Bioengineering, University of Maryland, College Park, Maryland 20742, USA.
⁴ Joint Quantum Institute, University of Maryland, College Park, Maryland 20742, USA.
⁵ Institute for Physical Science and Technology, University of Maryland, College Park, Maryland 20742, USA.
⁶ Department of Electrical and Computer Engineering, University of Maryland, College Park, Maryland 20742, USA.
⁷ Departments of Physics and Geology, and the Institute for Research in Electronics and Applied Physics, University of Maryland, College Park, Maryland 20742, USA.

PMID: 31893653
DOI: 10.1063/1.5123753

Abstract

We describe the continuous-time dynamics of networks implemented on Field Programable Gate Arrays (FPGAs). The networks can perform Boolean operations when the FPGA is in the clocked (digital) mode; however, we run the programed FPGA in the unclocked (analog) mode. Our motivation is to use these FPGA networks as ultrafast machine-learning processors, using the technique of reservoir computing. We study both the undriven dynamics and the input response of these networks as we vary network design parameters, and we relate the dynamics to accuracy on two machine-learning tasks.