Implementation of Synaptic Device Using Various High- k Gate Dielectric Stacks

J Nanosci Nanotechnol. 2020 Jul 1;20(7):4292-4297. doi: 10.1166/jnn.2020.17788.

Abstract

We investigate the characteristics of short-term and long-term synaptic plasticity in a Si-based fieldeffect transistor (FET)-type memory device. An Al₂O₃/HfO₂/Si₃N₄/SiO₂ gate dielectric stack is used to realize short-term and long-term plasticity (STP/LTP). Si₃N₄ and HfO₂ layers are designed to charge trap layer for synaptic device. The mechanism of STP and LTP operation is analyzed by considering the device response to the potentiation and depression pulses and retention measurement of the memory functionality. To investigate the STP operation, paired pulse facilitation (PPF) measurement is performed. The retention characteristic is also studied to validate the LTP property of the device. By investigating a device with an Al₂O₃/HfO₂/Si₃N₄ stack as a control device, it is shown that the Al₂O₃/HfO₂/Si₃N₄/SiO₂ stack device is suitable for a synaptic device in neuromorphic systems.

Publication types

  • Research Support, Non-U.S. Gov't