Addendum: A graph placement methodology for fast chip design

Affiliations

• ¹ Google Research, Brain Team, Google, Mountain View, CA, USA. [email protected].
• ² Computer Science Department, Stanford University, Stanford, CA, USA. [email protected].
• ³ Google Research, Brain Team, Google, Mountain View, CA, USA. [email protected].
• ⁴ Computer Science Department, Stanford University, Stanford, CA, USA. [email protected].
• ⁵ Google Chip Implementation and Infrastructure (CI2) Team, Google, Sunnyvale, CA, USA.
• ⁶ Google Research, Brain Team, Google, Mountain View, CA, USA.
• ⁷ Computer Science Department, Stanford University, Stanford, CA, USA.