Hafnia-Based Ferroelectric Transistor with Poly-Si Gates for Gate-First Three-Dimensional NAND Structures

ACS Appl Mater Interfaces. 2024 Dec 4;16(48):66273-66279. doi: 10.1021/acsami.4c17210. Epub 2024 Nov 20.

Abstract

Ferroelectric transistors based on hafnia-based ferroelectrics have emerged as promising candidates for next-generation memory devices. Additionally, hafnia-based ferroelectric transistors are suggested for three-dimensional (3D) memory devices, such as 3D ferroelectric NAND. This paper investigates the utilization of poly-Si as a gate material for hafnia-based ferroelectric transistors in 3D NAND structures. Conventional gate materials, such as TiN or W, are usually deposited in 3D NAND structures by using the gate-last process, which requires an additional gate replacement process. We demonstrate that poly-Si can be used as a gate material for hafnia-based ferroelectric transistors. We show that the 3D ferroelectric NAND based on the poly-Si gate can be fabricated by a simpler gate-first process without requiring a gate replacement process. Our findings underscore the potential of poly-Si as a gate material for ferroelectric transistors and 3D ferroelectric NAND.

Keywords: 3D structure; ferroelectric material; ferroelectric memory; gate electrode; poly silicon.