Lee JH - Search Results

1

Proposition of deposition and bias conditions for optimal signal-to-noise-ratio in resistor- and FET-type gas sensors.

Shin W , Jung G , Hong S , Jeong Y , Park J , Kim D , Jang D , Kwon D , Bae JH , Park BG , Lee JH . Shin W , et al. Among authors: lee jh. Nanoscale. 2020 Oct 14;12(38):19768-19775. doi: 10.1039/d0nr04406g. Epub 2020 Sep 23. Nanoscale. 2020. PMID: 32966525

2

Co-integration of nano-scale vertical- and horizontal-channel metal-oxide-semiconductor field-effect transistors for low power CMOS technology.

Sun MC, Kim G, Kim SW, Kim HW, Kim H, Lee JH, Shin H, Park BG. Sun MC, et al. Among authors: lee jh. J Nanosci Nanotechnol. 2012 Jul;12(7):5313-7. doi: 10.1166/jnn.2012.6226. J Nanosci Nanotechnol. 2012. PMID: 22966563

3

Phenomenological analysis of random telegraph noise in amorphous TiOx-based bipolar resistive switching random access memory devices.

Lee JK, Lee JW, Bae JH, Park J, Chung SW, Roh JS, Hong SJ, Lee JH. Lee JK, et al. Among authors: lee jw, lee jh. J Nanosci Nanotechnol. 2012 Jul;12(7):5392-6. doi: 10.1166/jnn.2012.6249. J Nanosci Nanotechnol. 2012. PMID: 22966577

4

Suppression of inhibit cell Vth disturbance in three dimensional stack NAND flash memory.

Choe BI, Park BG, Lee JK, Lee JH. Choe BI, et al. Among authors: lee jh, lee jk. J Nanosci Nanotechnol. 2013 Sep;13(9):6382-8. doi: 10.1166/jnn.2013.7623. J Nanosci Nanotechnol. 2013. PMID: 24205666

5

Parameter modeling for nanopore lonic field effect transistors in 3-D device simulation.

Park JM, Chun H, Park YE, Park BG, Lee JH. Park JM, et al. Among authors: lee jh. J Nanosci Nanotechnol. 2014 Nov;14(11):8171-5. doi: 10.1166/jnn.2014.9906. J Nanosci Nanotechnol. 2014. PMID: 25958494

6

Dual-Gate p-GaN Gate High Electron Mobility Transistors for Steep Subthreshold Slope.

Bae JH, Lee JH. Bae JH, et al. Among authors: lee jh. J Nanosci Nanotechnol. 2016 May;16(5):4919-23. doi: 10.1166/jnn.2016.12258. J Nanosci Nanotechnol. 2016. PMID: 27483846

7

Ultralow power switching in a silicon-rich SiN_y/SiN_x double-layer resistive memory device.

Kim S, Chang YF, Kim MH, Bang S, Kim TH, Chen YC, Lee JH, Park BG. Kim S, et al. Among authors: lee jh. Phys Chem Chem Phys. 2017 Jul 26;19(29):18988-18995. doi: 10.1039/c7cp03120c. Phys Chem Chem Phys. 2017. PMID: 28702540

8

Scaling Effect on Silicon Nitride Memristor with Highly Doped Si Substrate.

Kim S, Jung S, Kim MH, Chen YC, Chang YF, Ryoo KC, Cho S, Lee JH, Park BG. Kim S, et al. Among authors: lee jh. Small. 2018 May;14(19):e1704062. doi: 10.1002/smll.201704062. Epub 2018 Apr 17. Small. 2018. PMID: 29665257

9

Analog Complementary Metal-Oxide-Semiconductor Integrate-and-Fire Neuron Circuit for Overflow Retaining in Hardware Spiking Neural Networks.

Hwang S, Lee JJ, Kwon MW, Baek MH, Jang T, Chang J, Lee JH, Park BG. Hwang S, et al. Among authors: lee jh, lee jj. J Nanosci Nanotechnol. 2020 May 1;20(5):3117-3122. doi: 10.1166/jnn.2020.17390. J Nanosci Nanotechnol. 2020. PMID: 31635655

10

Investigation on Ambipolar Current Suppression Using a Stacked Gate in an L-shaped Tunnel Field-Effect Transistor.

Yu J, Kim S, Ryu D, Lee K, Kim C, Lee JH, Kim S, Park BG. Yu J, et al. Among authors: lee k, lee jh. Micromachines (Basel). 2019 Nov 3;10(11):753. doi: 10.3390/mi10110753. Micromachines (Basel). 2019. PMID: 31684162 Free PMC article.

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