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11 pages, 801 KiB  
Article
Characterization of Trap States in AlGaN/GaN MIS-High-Electron-Mobility Transistors under Semi-on-State Stress
by Ye Liang, Jiachen Duan, Ping Zhang, Kain Lu Low, Jie Zhang and Wen Liu
Nanomaterials 2024, 14(18), 1529; https://doi.org/10.3390/nano14181529 - 20 Sep 2024
Abstract
Devices under semi-on-state stress often suffer from more severe current collapse than when they are in the off-state, which causes an increase in dynamic on-resistance. Therefore, characterization of the trap states is necessary. In this study, temperature-dependent transient recovery current analysis determined a [...] Read more.
Devices under semi-on-state stress often suffer from more severe current collapse than when they are in the off-state, which causes an increase in dynamic on-resistance. Therefore, characterization of the trap states is necessary. In this study, temperature-dependent transient recovery current analysis determined a trap energy level of 0.08 eV under semi-on-state stress, implying that interface traps are responsible for current collapse. Multi-frequency capacitance–voltage (C-V) testing was performed on the MIS diode, calculating that interface trap density is in the range of 1.37×1013 to 6.07×1012cm2eV1 from ECET=0.29 eV to 0.45 eV. Full article
(This article belongs to the Special Issue Epitaxial Growth of III-Nitride Hetero- and Nanostructures)
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10 pages, 4095 KiB  
Article
Improvement of Single Event Transient Effects for a Novel AlGaN/GaN High Electron-Mobility Transistor with a P-GaN Buried Layer and a Locally Doped Barrier Layer
by Juan Xiong, Xintong Xie, Jie Wei, Shuxiang Sun and Xiaorong Luo
Micromachines 2024, 15(9), 1158; https://doi.org/10.3390/mi15091158 - 16 Sep 2024
Abstract
In this paper, a novel AlGaN/GaN HEMT structure with a P-GaN buried layer in the buffer layer and a locally doped barrier layer under the gate (PN-HEMT) is proposed to enhance its resistance to single event transient (SET) effects while also overcoming the [...] Read more.
In this paper, a novel AlGaN/GaN HEMT structure with a P-GaN buried layer in the buffer layer and a locally doped barrier layer under the gate (PN-HEMT) is proposed to enhance its resistance to single event transient (SET) effects while also overcoming the degradation of other characteristics. The device operation mechanism and characteristics are investigated by TCAD simulation. The results show that the peak electric field and impact ionization at the gate edges are reduced in the PN-HEMT due to the introduced P-GaN buried layer in the buffer layer. This leads to a decrease in the peak drain current (Ipeak) induced by the SET effect and an improvement in the breakdown voltage (BV). Additionally, the locally doped barrier layer provides extra electrons to the channel, resulting in higher saturated drain current (ID,sat) and maximum transconductance (gmax). The Ipeak of the PN-HEMT (1.37 A/mm) is 71.8% lower than that of the conventional AlGaN/GaN HEMT (C-HEMT) (4.85 A/mm) at 0.6 pC/µm. Simultaneously, ID,sat and BV are increased by 21.2% and 63.9%, respectively. Therefore, the PN-HEMT enhances the hardened SET effect of the device without sacrificing other key characteristics of the AlGaN/GaN HEMT. Full article
(This article belongs to the Special Issue Advances in GaN- and SiC-Based Electronics: Design and Applications)
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11 pages, 3101 KiB  
Article
Influence of the Bias Voltage on Effective Electron Velocity in AlGaN/GaN High Electron Mobility Transistors
by Guangyuan Jiang, Peng Cui, Chen Fu, Yuanjie Lv, Ming Yang, Qianding Cheng, Yang Liu and Guangyuan Zhang
Micromachines 2024, 15(9), 1148; https://doi.org/10.3390/mi15091148 - 13 Sep 2024
Abstract
The small-signal S parameters of the fabricated double-finger gate AlGaN/GaN high electron mobility transistors (HEMTs) were measured at various direct current quiescent operating points (DCQOPs). Under active bias conditions, small-signal equivalent circuit (SSEC) parameters such as Rs and Rd, and [...] Read more.
The small-signal S parameters of the fabricated double-finger gate AlGaN/GaN high electron mobility transistors (HEMTs) were measured at various direct current quiescent operating points (DCQOPs). Under active bias conditions, small-signal equivalent circuit (SSEC) parameters such as Rs and Rd, and intrinsic parameters were extracted. Utilizing fT and the SSEC parameters, the effective electron velocity (νeeff) and intrinsic electron velocity (νeint) corresponding to each gate bias (VGS) were obtained. Under active bias conditions, the influence mechanism of VGS on νeeff was systematically studied, and an expression was established that correlates νeeff, νeint, and bias-dependent parasitic resistances. Through the analysis of the main scattering mechanisms in AlGaN/GaN HEMTs, it has been discovered that the impact of VGS on νeeff should be comprehensively analyzed from the aspects of νeint and parasitic resistances. On the one hand, changes in VGS influence the intensity of polar optical phonon (POP) scattering and polarization Coulomb field (PCF) scattering, which lead to changes in νeint dependent on VGS. The trend of νeint with changes in VGS plays a dominant role in determining the trend of νeeff with changes in VGS. On the other hand, both POP scattering and PCF scattering affect νeeff through their impact on parasitic resistance. Since there is a difference in the additional scattering potential corresponding to the additional polarization charges (APC) between the gate-source/drain regions and the region under the gate, the mutual effects of PCF scattering on the under-gate electron system and the gate-source/drain electron system should be considered when adjusting the PCF scattering intensity through device structure optimization to improve linearity. This study contributes to a new understanding of the electron transport mechanisms in AlGaN/GaN HEMTs and provides a novel theoretical basis for improving device performance. Full article
(This article belongs to the Section D1: Semiconductor Devices)
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9 pages, 3733 KiB  
Article
Improvement of DC Performance and RF Characteristics in GaN-Based HEMTs Using SiNx Stress-Engineering Technique
by Chenkai Deng, Peiran Wang, Chuying Tang, Qiaoyu Hu, Fangzhou Du, Yang Jiang, Yi Zhang, Mujun Li, Zilong Xiong, Xiaohui Wang, Kangyao Wen, Wenmao Li, Nick Tao, Qing Wang and Hongyu Yu
Nanomaterials 2024, 14(18), 1471; https://doi.org/10.3390/nano14181471 - 10 Sep 2024
Abstract
In this work, the DC performance and RF characteristics of GaN-based high-electron-mobility transistors (HEMTs) using the SiNx stress-engineered technique were systematically investigated. It was observed that a significant reduction in the peak electric field and an increase in the effective barrier thickness [...] Read more.
In this work, the DC performance and RF characteristics of GaN-based high-electron-mobility transistors (HEMTs) using the SiNx stress-engineered technique were systematically investigated. It was observed that a significant reduction in the peak electric field and an increase in the effective barrier thickness in the devices with compressive SiNx passivation contributed to the suppression of Fowler–Nordheim (FN) tunneling. As a result, the gate leakage decreased by more than an order of magnitude, and the breakdown voltage (BV) increased from 44 V to 84 V. Moreover, benefiting from enhanced gate control capability, the devices with compressive stress SiNx passivation showed improved peak transconductance from 315 mS/mm to 366 mS/mm, along with a higher cutoff frequency (ft) and maximum oscillation frequency (fmax) of 21.15 GHz and 35.66 GHz, respectively. Due to its enhanced frequency performance and improved pinch-off characteristics, the power performance of the devices with compressive stress SiNx passivation was markedly superior to that of the devices with stress-free SiNx passivation. These results confirm the substantial potential of the SiNx stress-engineered technique for high-frequency and high-output power applications, which are crucial for future communication systems. Full article
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14 pages, 19858 KiB  
Article
Operational Characteristics of AlGaN/GaN High-Electron-Mobility Transistors with Various Dielectric Passivation Structures for High-Power and High-Frequency Operations: A Simulation Study
by Ji-Hun Kim, Chae-Yun Lim, Jae-Hun Lee, Jun-Hyeok Choi, Byoung-Gue Min, Dong Min Kang and Hyun-Seok Kim
Micromachines 2024, 15(9), 1126; https://doi.org/10.3390/mi15091126 - 3 Sep 2024
Viewed by 223
Abstract
This study investigates the operational characteristics of AlGaN/GaN high-electron-mobility transistors (HEMTs) by employing various passivation materials with different dielectric constants and passivation structures. To ensure the simulation reliability, the parameters were calibrated based on the measured data from the fabricated basic Si3 [...] Read more.
This study investigates the operational characteristics of AlGaN/GaN high-electron-mobility transistors (HEMTs) by employing various passivation materials with different dielectric constants and passivation structures. To ensure the simulation reliability, the parameters were calibrated based on the measured data from the fabricated basic Si3N4 passivation structure of the HEMT. The Si3N4 passivation material was replaced with high-k materials, such as Al2O3 and HfO2, to improve the breakdown voltage. The Al2O3 and HfO2 passivation structures achieved breakdown voltage improvements of 6.62% and 17.45%, respectively, compared to the basic Si3N4 passivation structure. However, the increased parasitic capacitances reduced the cut-off frequency. To mitigate this reduction, the operational characteristics of hybrid and partial passivation structures were analyzed. Compared with the HfO2 passivation structure, the HfO2 partial passivation structure exhibited a 7.6% reduction in breakdown voltage but a substantial 82.76% increase in cut-off frequency. In addition, the HfO2 partial passivation structure exhibited the highest Johnson’s figure of merit. Consequently, considering the trade-off relationship between breakdown voltage and frequency characteristics, the HfO2 partial passivation structure emerged as a promising candidate for high-power and high-frequency AlGaN/GaN HEMT applications. Full article
(This article belongs to the Special Issue GaN-Based Materials and Devices: Research and Applications)
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17 pages, 1771 KiB  
Article
Modelling and Evalaution of the Bidirectional Surge Current Robustness of Si(-IGBT and -Diode), SiC(-MOSFETs and -JFET) and GaN(-HEMTs) Devices
by Dominik Nehmer, Tim Ringelmann and Mark-M. Bakran
Energies 2024, 17(17), 4362; https://doi.org/10.3390/en17174362 - 31 Aug 2024
Viewed by 366
Abstract
This paper will evaluate the surge current robustness of different devices in relation to the active short circuit (ASC). For the purposes of this study, a Si IGBT and its diode, two SiC MOSFETs with different voltage ratings, a SiC JFET, and three [...] Read more.
This paper will evaluate the surge current robustness of different devices in relation to the active short circuit (ASC). For the purposes of this study, a Si IGBT and its diode, two SiC MOSFETs with different voltage ratings, a SiC JFET, and three GaN HEMTs will be compared. For the GaN devices, a eMode, a dMode, and a cascode device are employed. With the exception of the Si diode, all devices exhibited a current saturation effect. This saturation will result in significant losses and, ultimately, a thermal defect. For all devices, a safe operating area (SOA) criterion is established. For the SiC and GaN devices, the saturation voltage can be employed to define the safe operating area (SOA) criterion. In this context, two on-state resistance models will be defined for these devices. One is solely temperature-dependent, while the other also considers current saturation. Consequently, the saturation voltage and the on-resistance model represent a straightforward methodology for evaluating the ASC robustness of the devices. For all devices, a recommendation for a loss model and SOA criterion will be provided. Finally, the surge current robustness of all devices is compared. The Si, SiC and GaN devices exhibit comparable high surge current robustness in the application, with the exception of the GaN eMode, which is susceptible to strong current saturation. Full article
(This article belongs to the Special Issue Energy, Electrical and Power Engineering 2024)
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12 pages, 5444 KiB  
Article
Electrical Properties and Reliability of AlGaN/GaN High Electron Mobility Transistor under RF Overdrive Stress at High Temperature
by Chang Liu, Yiqiang Chen, Yuhan Xie, Hongxia Liu and Zongqi Cai
Micromachines 2024, 15(9), 1100; https://doi.org/10.3390/mi15091100 - 30 Aug 2024
Viewed by 309
Abstract
We have investigated the electrical properties and reliability of AlGaN/GaN high electron mobility transistors (HEMT) under high-temperature RF overdrive stress. The experimental results show that the drain current and transconductance of the device decrease at 25 °C and 55 °C but do not [...] Read more.
We have investigated the electrical properties and reliability of AlGaN/GaN high electron mobility transistors (HEMT) under high-temperature RF overdrive stress. The experimental results show that the drain current and transconductance of the device decrease at 25 °C and 55 °C but do not change significantly at 85 °C before and after the stress. The decline rate of the saturation drain current, the degradation amplitude of transconductance, and the drift amplitude of threshold voltage decrease with the increase in temperature. The results of pulse IV and low-frequency noise tests show that the current collapse is inhibited, and the trap density is reduced at higher temperatures. The Electroluminescence (EL) test shows that the luminescence characteristics of the device after RF overdrive stress are more scattered and weaker. We believe that the degradation at lower temperatures is mainly due to the influence of the hot electron effect (HEE), while the change in electrical properties at higher temperatures is due to the weakening of HEE and the improvement of the Schottky interface. Full article
(This article belongs to the Section D1: Semiconductor Devices)
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15 pages, 7408 KiB  
Article
Schottky Barrier Formation Mechanism and Thermal Stability in Au-Free Cu/Metal–Silicide Contacts to GaN-Cap/AlGaN/AlN-Spacer/GaN-on-Si Heterostructure
by Marek Wzorek, Marek Ekielski, Krzysztof Piskorski, Jarosław Tarenko, Michał A. Borysiewicz, Ernest Brzozowski and Andrzej Taube
Electronics 2024, 13(17), 3429; https://doi.org/10.3390/electronics13173429 - 29 Aug 2024
Viewed by 317
Abstract
In this study, metal–silicide-based contacts to GaN-cap/AlGaN/AlN-spacer/GaN-on-Si heterostructure were investigated. Planar Schottky diodes with Cu-covered anodes comprising silicide layers of various metal–silicon (M–Si) compositions were fabricated and characterized in terms of their electrical parameters and thermal stability. The investigated contacts included Ti–Si, Ta–Si, [...] Read more.
In this study, metal–silicide-based contacts to GaN-cap/AlGaN/AlN-spacer/GaN-on-Si heterostructure were investigated. Planar Schottky diodes with Cu-covered anodes comprising silicide layers of various metal–silicon (M–Si) compositions were fabricated and characterized in terms of their electrical parameters and thermal stability. The investigated contacts included Ti–Si, Ta–Si, Co–Si, Ni–Si, Pd–Si, Ir–Si, and Pt–Si layers. Reference diodes with pure Cu or Au/Ni anodes were also examined. To test the thermal stability, selected devices were subjected to subsequent annealing steps in vacuum at incremental temperatures up to 900 °C. The Cu/M–Si anodes showed significantly better thermal stability than the single-layer Cu contact, and in most cases exceeded the stability of the reference Au/Ni contact. The work functions of the sputtered thin layers were determined to support the discussion of the formation mechanism of the Schottky barrier. It was concluded that the barrier heights were dependent on the M–Si composition, although they were not dependent on the work function of the layers. An extended, unified Schottky barrier formation model served as the basis for explaining the complex electrical behavior of the devices under investigation. Full article
(This article belongs to the Special Issue New Advances in Semiconductor Devices/Circuits)
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9 pages, 7239 KiB  
Article
Proton-Irradiation Effects and Reliability on GaN-Based MIS-HEMTs
by Zixin Zhen, Chun Feng, Hongling Xiao, Lijuan Jiang and Wei Li
Micromachines 2024, 15(9), 1091; https://doi.org/10.3390/mi15091091 - 29 Aug 2024
Viewed by 312
Abstract
A comprehensive study of proton irradiation reliability on a bilayer dielectrics SiNx/Al2O3 MIS-HEMT, the common Schottky gate HEMT, and a single dielectric layer MIS-HEMT with SiNx and with Al2O3 for comparison is conducted in [...] Read more.
A comprehensive study of proton irradiation reliability on a bilayer dielectrics SiNx/Al2O3 MIS-HEMT, the common Schottky gate HEMT, and a single dielectric layer MIS-HEMT with SiNx and with Al2O3 for comparison is conducted in this paper. Combining the higher displacement threshold energy of Al2O3 with the better surface passivation of the SiNx layer, the bilayer dielectrics MIS-HEMT presents much smaller degradation of structural materials and of device electrical performance after proton irradiation. Firstly, the least of the defects caused by irradiation suggesting the smallest structural material degradation is observed in the bilayer dielectrics MIS-HEMT through simulations. Then, DC and RF electrical performance of four kinds of devices before and after proton irradiation are studied through simulation and experiments. The smallest threshold voltage degradation rate, the smallest maximum on-current degradation and Gm degradation, the largest cut-off frequency, and the lowest cut-off frequency degradation are found in the bilayer dielectrics MIS-HEMT among four kinds of devices. The degradation results of both structural materials and electrical performance reveal that the bilayer dielectrics MIS-HEMT performs best after irradiation and had better radiation resilience. Full article
(This article belongs to the Special Issue Recent Progress in 2D Semiconductor Materials and Devices)
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15 pages, 3105 KiB  
Article
Temperature Characteristics Modeling for GaN PA Based on PSO-ELM
by Qian Lin and Meiqian Wang
Micromachines 2024, 15(8), 1008; https://doi.org/10.3390/mi15081008 - 5 Aug 2024
Viewed by 527
Abstract
In order to solve the performance prediction and design optimization of power amplifiers (PAs), the performance parameters of Gallium Nitride high-electron-mobility transistor (GaN HEMT) PAs at different temperatures are modeled based on the particle swarm optimization–extreme learning machine (PSO-ELM) and extreme learning machine [...] Read more.
In order to solve the performance prediction and design optimization of power amplifiers (PAs), the performance parameters of Gallium Nitride high-electron-mobility transistor (GaN HEMT) PAs at different temperatures are modeled based on the particle swarm optimization–extreme learning machine (PSO-ELM) and extreme learning machine (ELM) in this paper. Then, it can be seen that the prediction accuracy of the PSO-ELM model is superior to that of ELM with a minimum mean square error (MSE) of 0.0006, which indicates the PSO-ELM model has a stronger generalization ability when dealing with the nonlinear relationship between temperature and PA performance. Therefore, this investigation can provide vital theoretical support for the performance optimization of PA design. Full article
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10 pages, 4456 KiB  
Article
A CMOS-Compatible Process for ≥3 kV GaN Power HEMTs on 6-inch Sapphire Using In Situ SiN as the Gate Dielectric
by Jie Zhang, Xiangdong Li, Jian Ji, Shuzhen You, Long Chen, Lezhi Wang, Zilan Li, Yue Hao and Jincheng Zhang
Micromachines 2024, 15(8), 1005; https://doi.org/10.3390/mi15081005 - 2 Aug 2024
Viewed by 615
Abstract
The application of GaN HEMTs on silicon substrates in high-voltage environments is significantly limited due to their complex buffer layer structure and the difficulty in controlling wafer warpage. In this work, we successfully fabricated GaN power HEMTs on 6-inch sapphire substrates using a [...] Read more.
The application of GaN HEMTs on silicon substrates in high-voltage environments is significantly limited due to their complex buffer layer structure and the difficulty in controlling wafer warpage. In this work, we successfully fabricated GaN power HEMTs on 6-inch sapphire substrates using a CMOS-compatible process. A 1.5 µm thin GaN buffer layer with excellent uniformity and a 20 nm in situ SiN gate dielectric ensured uniformly distributed VTH and RON across the entire 6-inch wafer. The fabricated devices with an LGD of 30 µm and WG of 36 mm exhibited an RON of 18.06 Ω·mm and an off-state breakdown voltage of over 3 kV. The electrical mapping visualizes the high uniformity of RON and VTH distributed across the whole 6-inch wafer, which is of great significance in promoting the applications of GaN power HEMTs for medium-voltage power electronics in the future. Full article
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10 pages, 3465 KiB  
Article
A Study on the Dynamic Switching Characteristics of p-GaN HEMT Power Devices
by Chen Fan, Haitao Zhang, Huipeng Liu, Xiaofei Pan, Su Yan, Hongliang Chen, Wei Guo, Lin Cai and Shuhua Wei
Micromachines 2024, 15(8), 993; https://doi.org/10.3390/mi15080993 - 31 Jul 2024
Viewed by 566
Abstract
This study employs an innovative dynamic switching test system to investigate the dynamic switching characteristics of three p-GaN HEMT devices. The dynamic switching characteristics are different from the previous research on the dynamic resistance characteristics of GaN devices, and the stability of GaN [...] Read more.
This study employs an innovative dynamic switching test system to investigate the dynamic switching characteristics of three p-GaN HEMT devices. The dynamic switching characteristics are different from the previous research on the dynamic resistance characteristics of GaN devices, and the stability of GaN devices can be analyzed from the perspective of switching characteristics. Based on the theory of dynamic changes in threshold opening voltage and capacitance caused by electrical stress, the mechanism of dynamic switching characteristics of GaN HEMT devices is studied and analyzed in detail. The test results have shown that electrical stress induces trap ionization within the device, resulting in fluctuations in electric potential and ultimately leading to alterations in two critical factors of the dynamic switching characteristics of GaN HEMT devices, the parasitic capacitance and the threshold voltage. The dynamic changes in capacitance before and after electrical stress vary among devices, resulting in different dynamic switching characteristics. The test system is capable of extracting the switching waveform for visual comparison and quantitatively calculating the changes in switching parameters before and after electrical stressing. This test provides a prediction for the drift of switch parameters, offering pre-guidance for the robustness of the optimized application scheme. Full article
(This article belongs to the Special Issue Power Semiconductor Devices and Applications, 3rd Edition)
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9 pages, 3530 KiB  
Article
Investigation of the Dislocation Behavior of 6- and 8-Inch AlGaN/GaN HEMT Structures with a Thin AlGaN Buffer Layer Grown on Si Substrates
by Yujie Yan, Jun Huang, Lei Pan, Biao Meng, Qiangmin Wei and Bing Yang
Inorganics 2024, 12(8), 207; https://doi.org/10.3390/inorganics12080207 - 30 Jul 2024
Viewed by 451
Abstract
Developing cost-effective methods to synthesize large-size GaN films remains a challenge owing to the high dislocation density during heteroepitaxy. Herein, AlGaN/GaN HEMTs were grown on 6- and 8-inch Si(111) substrates using metal–organic chemical vapor deposition, and their basic properties and dislocation evolution characteristics [...] Read more.
Developing cost-effective methods to synthesize large-size GaN films remains a challenge owing to the high dislocation density during heteroepitaxy. Herein, AlGaN/GaN HEMTs were grown on 6- and 8-inch Si(111) substrates using metal–organic chemical vapor deposition, and their basic properties and dislocation evolution characteristics were investigated thoroughly. With the insertion of a 100 nm thin AlGaN buffer layer, bow–warp analysis of the epitaxial wafers revealed excellent stress control for both the 6- and 8-inch wafers. HR-XRD and AFM analyses validated the high crystal quality and step-flow growth mode of GaN. Further, Hall measurements demonstrated the superior transport performance of AlGaN/GaN heterostructures. It is worth noting that dislocations tended to annihilate in the AlN nucleation layer, the thin AlGaN buffer layer, and the GaN buffer layer in the initial thickness range of 200–300 nm, which was indicated by ADF-STEM. To be specific, the heterointerfaces exhibited a significant effect on the annihilation of c-type (b = <0001>) dislocations, which led to the formation of dislocation loops. The thin inserted layers within the AlGaN buffer layer played a key role in promoting the annihilation of c-type dislocations, while they exerted less influence on a-type (b = 1/3<112¯0>) and (a+c)-type (b = 1/3<112¯3>) dislocations. Within an initial thickness of 200–300 nm in the GaN buffer layer, a-type and (a+c)-type dislocations underwent strong interactions, leading to considerable dislocation annihilation. In addition, the EELS results suggested that the V-shaped pits in the AlN nucleation layer were filled with the AlGaN thin layer with a low Al content. Full article
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17 pages, 6429 KiB  
Article
Design Optimization of an Enhanced-Mode GaN HEMT with Hybrid Back Barrier and Breakdown Voltage Prediction Based on Neural Networks
by Kuiyuan Tian, Jinwei Hu, Jiangfeng Du and Qi Yu
Electronics 2024, 13(15), 2937; https://doi.org/10.3390/electronics13152937 - 25 Jul 2024
Viewed by 621
Abstract
To improve the breakdown voltage (BV), a GaN-based high-electron-mobility transistor with a hybrid AlGaN back barrier (HBB-HEMT) was proposed. The hybrid AlGaN back barrier was constructed using the Al0.25Ga0.75N region and Al0.1 [...] Read more.
To improve the breakdown voltage (BV), a GaN-based high-electron-mobility transistor with a hybrid AlGaN back barrier (HBB-HEMT) was proposed. The hybrid AlGaN back barrier was constructed using the Al0.25Ga0.75N region and Al0.1G0.9N region, each with a distinct Al composition. Simulation results of the HBB-HEMT demonstrated a breakdown voltage (1640 V) that was 212% higher than that of the conventional HEMT (Conv-HEMT) and a low on-resistance (0.4 mΩ·cm2). Ultimately, the device achieved a high Baliga’s figure of merit (7.3 GW/cm2) among reported devices of similar size. A back-propagation (BP) neural network-based prediction model was trained to predict BV for enhanced efficiency in subsequent work. The model was trained and calibrated, achieving a correlation coefficient (R) of 0.99 and a prediction accuracy of 95% on the test set. The results indicated that the BP neural network model using the Levenberg–Marquardt algorithm accurately predicted the forward breakdown voltage of the HBB-HEMT, underscoring the feasibility and significance of neural network models in designing GaN power devices. Full article
(This article belongs to the Special Issue Neuromorphic Computing: Devices, Chips, and Algorithm)
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13 pages, 3971 KiB  
Article
Charge Trapping and Emission during Bias Temperature Stressing of Schottky Gate GaN-on-Silicon HEMT Structures Targeting RF/mm Wave Power Amplifiers
by Barry O’Sullivan, Aarti Rathi, Alireza Alian, Sachin Yadav, Hao Yu, Arturo Sibaja-Hernandez, Uthayasankaran Peralagu, Bertrand Parvais, Adrian Chasin and Nadine Collaert
Micromachines 2024, 15(8), 951; https://doi.org/10.3390/mi15080951 - 24 Jul 2024
Viewed by 474
Abstract
For operation as power amplifiers in RF applications, high electron mobility transistor (HEMT) structures are subjected to a range of bias conditions, applied at both the gate and drain terminals, as the device is biased from the OFF- to ON-state conditions. The stability [...] Read more.
For operation as power amplifiers in RF applications, high electron mobility transistor (HEMT) structures are subjected to a range of bias conditions, applied at both the gate and drain terminals, as the device is biased from the OFF- to ON-state conditions. The stability of the device threshold voltage (Vt) condition is imperative from a circuit-design perspective and is the focus of this study, where stresses in both the ON and OFF states are explored. We see rapid positive threshold voltage increases under negative bias stress and subsequent recovery (i.e., Vt reduces), whereas conversely, we see a negative Vt shift under positive stress and Vt increase during the subsequent relaxation phase. These effects are correlated with the thickness of the GaN layer and ultimately result from the deep carbon-acceptor levels in the C-GaN back barrier incorporated to screen the buffer between the silicon substrate and the epitaxially grown GaN layer. Methods to mitigate this effect are explored, and the consequences are discussed. Full article
(This article belongs to the Special Issue Reliability Issues in Advanced Transistor Nodes, Second Edition)
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