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15th FDL 2012: Vienna, Austria
- Jan Haase
:
Models, Methods, and Tools for Complex Chip Design - Selected Contributions from FDL 2012. Lecture Notes in Electrical Engineering 265, Springer 2014, ISBN 978-3-319-01417-3 - Binghao Bao, Jörg Bormann, Markus Wedler, Dominik Stoffel, Wolfgang Kunz:
Formal Plausibility Checks for Environment Constraints. 1-16 - Syed Hussein Syed Alwi, Cécile Braunstein, Emmanuelle Encrenaz:
Efficient Refinement Strategy Exploiting Component Properties in a CEGAR Process. 17-36 - Rolf Drechsler
, Mathias Soeken
, Robert Wille
:
Formal Specification Level. 37-52 - David J. Greaves, Muhammad Mehboob Yasin:
TLM POWER3: Power Estimation Methodology for SystemC TLM 2.0. 53-68 - Jan Henrik Weinstock, Christoph Schumacher, Rainer Leupers, Gerd Ascheid:
SCandal: SystemC Analysis for Nondeterminism Anomalies. 69-88 - Yao Li, Ramy Iskander, Farakh Javid, Marie-Minerve Louërat:
A Design and Verification Methodology for Mixed-Signal Systems Using SystemC-AMS. 89-108 - Manuel Harrant, Thomas Nirmaier, Christoph Grimm
, Georg Pelz:
Configurable Load Emulation Using FPGA and Power Amplifiers for Automotive Power ICs. 109-126 - Javier Moreno Molina, Markus Damm, Jan Haase
, Edgar Holleis, Christoph Grimm
:
Model Based Design of Distributed Embedded Cyber Physical Systems. 127-143 - Fernando Herrera, Pablo Peñil
, Hector Posadas, Eugenio Villar
:
Model-Driven Methodology for the Development of Multi-level Executable Environments. 145-164 - Slobodanka Tomic, Jan Haase
, Goran Lazendic:
GREEN HOME: The Concept and Study of Grid Responsiveness. 165-178 - Saraju P. Mohanty, Elias Kougianos:
Polynomial Metamodel-Based Fast Optimization of Nanoscale PLL Components. 179-199 - Johann Glaser, Clifford Wolf:
Methodology and Example-Driven Interconnect Synthesis for Designing Heterogeneous Coarse-Grain Reconfigurable Architectures. 201-221
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