![](https://dblp.uni-trier.de/img/logo.ua.320x120.png)
![](https://dblp.uni-trier.de/img/dropdown.dark.16x16.png)
![](https://dblp.uni-trier.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
![search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
default search action
7th RSP 1996: Thessaloniki, Greece
- Seventh IEEE International Workshop on Rapid System Prototyping (RSP '96), Thessaloniki, Greece, June 19-21, 1996. IEEE Computer Society 1996, ISBN 0-8186-7603-5
Session 1: Emulation
- Huy Nam Nguyen, Michel Thill:
Design Verification based on Hardware Emulation. 2-4 - Kazuhiro Hayashi, Toshiaki Miyazaki, Kazuhiro Shirakawa, Kazuhisa Yamada, Takaki Ichimori, Ken-nosuke Fukami, Naohisa Ohta:
A novel approach to real-time verification of transport system design using FPGA based emulator. 5-10 - Emeka Mosanya, Jean-Yves Perrier, Maxime Goeke, Flavio Rampogna, Julien Linder, Eduardo Sanchez:
A platform for co-design and co-synthesis based on FPGA. 11-17
Session 2: Hardware Software Codesign
- Peter Voigt Knudsen, Jan Madsen
:
Aspects of system modelling in Hardware/Software partitioning. 18-23 - Xun Xiong, Peter Gutberlet, Wolfgang Rosenstiel:
Automatic generation of interprocess communication in the PARAGON system. 24-29 - Ulrike Ober, Hans-Jürgen Herpel:
Hierarchical Partitioning in a Rapid Prototyping Environment. 30-35 - Paulo Romero Martins Maciel, Edna Barros:
Capturing Time Constraints by Using Petri-nets in the Context of Hardware/Software Codesign. 36-43
Session 3: Rapid System Prototyping for Telecom
- V. Vande Keere, Bart Staelens, Jan Vandewege:
Rapid Prototyping of a CATV Network Termination for ATM-based Video-on-demand Services. 44-49 - S. Martin, Vincent Olive:
Embedded test environment. 50-54 - Tsuneo Matsumura, Naoaki Yamanaka, Ryoichi Yamaguchi, Keiji Ishikawa:
Real-time Emulation Method for ATM Switching Systems in Broadband ISDN. 55-60 - Keiji Ishikawa, Tamio Hoshino:
Rapid protocol prototyping from message sequence chart based specification. 61-65
Session 4: Cosimulation
- Kyuseok Kim, Yongjoo Kim, Youngsoo Shin, Kiyoung Choi:
An integrated hardware-software cosimulation environment with automated interface generation. 66-71 - Carlos A. Valderrama, François Naçabal, Pierre G. Paulin, Ahmed Amine Jerraya:
Automatic generation of interfaces for distributed C-VHDL cosimulation of embedded systems: an industrial experience. 72-77 - Nikos Petrellis, Alexios N. Birbas, Michael K. Birbas, Evaggelinos P. Mariatos, George D. Papadopoulos:
Simulating hardware, software and electromechanical parts using communicating simulators. 78-82 - Michele Borgatti, Roberto Rambaldi, G. Gori, Roberto Guerrieri:
A smoothly upgradable approach to virtual emulation of HW/SW systems. 83-89
Session 5: System Level Specification
- Evaggelinos P. Mariatos, Michael K. Birbas, Alexios N. Birbas, Nikos Petrellis:
Object oriented prototyping at the system level: an image reconstruction application example. 90-95 - Mario Calha
, João Paulo Teixeira, Isabel C. Teixeira:
HW/SW specification using OOM techniques. 96-101 - Alioune Diagne, Fabrice Kordon:
A multi formalisms prototyping approach from formal description to implementation of distributed systems. 102-107 - Kevin O'Brien, Serge Maginot:
Fast prototyping of memory models in VHDL for hardware emulation. 108-115
Session 6: Design Methods
- Michel Foulon, Bernard Foucault:
New design and prototyping methods are neede in missile electronics industry. 116-121 - Dimitris Metafas, H. C. Karathanasis, Spyros Blionas:
Industrial approach in design methodologies for mobile communications systems. 122-126 - Daniel R. Brasen:
ASIC Prototyping with Reprogrammable Implementations of Large ASICs. 127-132 - Stefano Cardelli, Massimiliano Chiodo, Paolo Giusto, Attila Jurecska, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli:
Rapid-Prototyping of Embedded Systems via Reprogrammable Devices. 133-139
Session 7: Design Cases
- Bernard Ramanadin, François Pogodalla:
CO: the Chameleon 64-bit microprocessor ASIC prototype. 140-145 - Andreas Kirschbaum, Frank-Michael Renner, Alexander Wilmes, Manfred Glesner:
Rapid-Prototyping of a CAN-Bus Controller: A Case Study. 146-151 - A. Winter, D. Bittruf, Yankin Tanurhan, Klaus D. Müller-Glaser:
Rapid prototyping of a communication controller for the CAN bus. 152-157 - Christophe Deltoso, C. Joanblanq, M. Cand, P. Senn:
Fast prototyping based on generic and synthesizable VHDL models. A case study: punctured Viterbi decoders. 158-165
Session 8: Algorithms for Rapid System
- Marleen Adé, Rudy Lauwereins, J. A. Peperstraete:
Implementing DSP applications on heterogeneous targets using minimal size data buffers. 166-172 - Russ Klein:
Miami: a hardware software co-simulation environment. 173-177 - Luigi Carro, C. Pereira, Altamiro A. Suzim:
Prototyping and reengineering of microcontroller-based systems. 178-182 - Jo Dale Carothers, Donghui Li, Tom Hameenanttila:
MCG: a correct-by-design multichip module router with crosstalk avoidance. 183-188
![](https://dblp.uni-trier.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.