Motorola 68020: Difference between revisions

Content deleted Content added
Listing a bunch of possible pronunciations for a number is beyond unnecessary
Tags: Mobile edit Mobile web edit
(28 intermediate revisions by 14 users not shown)
Line 1:
{{Short description|32-bit microprocessor}}
{{Refimprove|date=November 2007}}
{{Infobox CPU
| name = Motorola 68020
| designfirm = Motorola
| produced-start= {{start date and age|1984}}
| arch = [[Motorola 68000 series]]
| data-width = 32 bits
Line 13 ⟶ 14:
| l1cache = {{nowrap|256 byte}} instruction cache<ref name="fund020"/>{{rp|578}}<ref name="free020UM" /><!--"128 16-bit word cache"-->
| pack1 = [[Pin grid array|PGA 169]] (114 pins used) {{nowrap|34.16 mm × 34.16 mm}}<ref name="fund020"/>{{rp|577}} (53&nbsp;°C/W without heatsink)<!--282/313--><ref name="free020UM">{{cite web| url = http://cache.freescale.com/files/32bit/doc/ref_manual/M68020UM.pdf| title = MC68020 MCEC68020 Microprocessors User's Manual| id = M68020UM/AD REV.2| date = 1992| website = [[Freescale Semiconductor]] | archive-url = https://web.archive.org/web/20160304085358/http://cache.freescale.com/files/32bit/doc/ref_manual/M68020UM.pdf| archive-date = March 4, 2016}}</ref>
| transistors = ~200,000<ref name="fund020">{{cite book | url = https://books.google.com/books?id=1QZEawDm9uAC&pg=PA577 | title = Fundamentals of Digital Logic and Microcomputer Design | author = Rafiquzzaman, M. | author-link = Mohamed Rafiquzzaman | page = 577-578 | publisher = John Wiley & Sons | year = 2005 | isbn = 978-0471733492 }}</ref>{{rp|577}}
| variant = 68EC020
| predecessor = [[Motorola 68010]]
Line 20 ⟶ 21:
[[Image:XC68020 top p1160084.jpg|thumb|250px|XC68020, a prototype of the 68020]]
 
The '''Motorola 68020''' ("''sixty-eight-oh-twenty''", "''sixty-eight-oh-two-oh''" or "''six-eight-oh-two-oh''") is a [[32-bit]] [[microprocessor]] from [[Motorola]], released in 1984. A lower -cost version was also made available, known as the '''68EC020'''. In keeping with naming practices common to Motorola designs, the 68020 is usually referred to as the "020", pronounced "oh-two-oh" or "oh-twenty".
 
The 020 was in the market for a relatively short time. The [[Motorola 68030]] was announced in September 1986 and began deliveries in the summer of 1987. Priced about the same as the 020 of the time, the 030 was significantly faster and quickly replaced in 020 in almost every use.
 
==History==
===68000 and 68010===
At the time the [[Motorola 68000]] was designed, Motorola's design and fabrication services were outdated. Although even small companies like [[MOS Technology]] and [[Zilog]] had moved on to silicon gate [[depletion mode]] [[NMOS logic]] on ever-larger [[semiconductor wafer|wafers]], Motorola was still using metal gates and enhancement mode and their largest fab worked on 4-inch wafers long after most lines had moved to 5-inch. Although the 68000 met the goal of being the fastest CPU available when it was introduced, it was not nearly as powerful as it could be if it had been designed with more modern techniques.{{sfn|Oral|2007|pp=9-11}}
 
During the period of the 68000 design, the company was working with [[Hitachi]] on their process technology and as part of this they opened a new fab, MOS-8, using 5-inch wafers and the latest [[HMOS]] process licensed from [[Intel]]. This line was capable of building all of the new techniques, but the 68000 went ahead with the older design as they were sure it would work. Moving to new design techniques would wait until the design was in the market.{{sfn|Oral|2007|p=10}} The conversion to the new design techniques took place during the [[Motorola 68010]] effort, a relatively minor upgrade to the original design that added basic [[virtual memory]] support for the emerging [[Unix workstation]] market.{{sfn|Oral|2007|p=20}}
 
===020 concept emerges===
As this effort was ongoing, Motorola was canvassing their customers for their desires for future developments in the line. These all pointed to a fully 32-bit implementation. Those using the 68k in Unix systems also stated they would purchase a [[floating point unit]] for every one of the machines if one was available.{{sfn|Oral|2007|p=22}}
 
The original 68000 had been designed as a hybrid 16/32-bit system largely because the maximum number of pins available on [[dual inline package]]s (DIPs) was 64, and even at that size, packaging of this size was highly problematic.{{sfn|Oral|2007|p=9}} By reducing the number of [[address bus|address pins]] to 24, and the [[data bus|data pins]] to only 16, there were enough free pins to implement all the other needed lines, like interrupts and power supplies. The 24-pin address bus meant that the memory could only be 16 MB in total, which was at this point becoming a limitation. The 16-bit data bus meant reading a 32-bit word from that memory required two bus cycles.
 
A design that had 32 pins for both the address and data busses would access data twice as fast, making the machine that much faster even with no other changes. Moving to 32 bit addressing would also make the implementation of virtual memory easier, and allow for more than 16 MB of [[random access memory]]. But doing so would also demand a much higher total pin count. By the early 1980s, similar limitations on all modern CPU designs led to the introduction of the [[pin grid array]] that replaced the DIP. For the new project, Motorola selected a 169-pin layout, giving them plenty of room to work with. The design ultimately used only 114 of them.
 
A great debate broke out about how to refer to the underlying design of the new chip in marketing materials. Technically, the 020 was moving from the long-established [[NMOS logic]] design to a [[CMOS]] layout, which requires two transistors per gate. Common knowledge of the era suggested that CMOS cost four times as much as NMOS, and there was a significant amount of the market that believed "CMOS equals bad."{{sfn|Oral|2007|p=29}}
 
===Launch, fabrication problems===
The design was completed in the summer of 1983 and announced in June 1984.<ref>{{cite magazine |title=Motorla 68020 |magazine= Electronic Design |date=18 September 1986 |page=27}}</ref> This "super chip" was significant news at the time, with the [[New York Times]] making it a lead story in their business section. The launch price was quoted at $487 each, about the same as the 68000 when it was launched in 1980, but the 68000 was now available for about $15. However, it was understood that it would be some time before computers using the new chip would be available, as existing designs would have to be heavily modified to take advantage of its performance.<ref>{{cite news |newspaper=The New York Times |date=29 June 1984 |title=Motorola's Powerful New Chip |first=David |last=Sanger |url=https://www.nytimes.com/1984/06/29/business/motorola-s-powerful-new-chip.html}}</ref>
 
The announcement led to Motorola's customers clamouring for supply. At this point, serious supply problems became evident. The design had been laid out to be built in the same MOS-8 factory as the 68000, although several new pieces of equipment were introduced to support it. By the time of the public release, the yield for the new chip was zero. That is, for every wafer sent through the multi-step process, zero working chips would be produced.{{sfn|Oral|2007|p=30}}
 
Gary Johnson concluded the problem was the floor manager of MOS-8, Tom Felesi, and decided to replace him with Bill Walker, who was at that time running the older MOS-2 factory. Walker arrived at the plant on 5 July 1985 to find Johnson had not bothered to tell Felesi of the change, and arguments followed. Johnson eventually told Felesi this was indeed happening. Walker then toured the plant and found it had been turned into what was essentially a [[research and development]] lab, not a production line, with numerous bits of machinery in use nowhere else.{{sfn|Oral|2007|p=30}}
 
One significant issue was a new piece of equipment from a new vendor, Genius, which produced [[silicide]]. The machine simply didn't work. Walker flew to California to meet with the CEO of Genius, who offered up nothing but excuses. Walker eventually slammed his hand down on the desk, breaking his watch band, and stated "No more excuses! I want this thing fixed now, today!" Genius took the demand seriously and fixed the machine. The CEO later sent Walker a new watch band to commemorate the event.{{sfn|Oral|2007|p=30}}
 
Meanwhile, Walker instituted a new policy at MOS-8 to improve the plant itself. He normally called meetings at 6:30 AM. If things were not going well, he would move that up to 5:30, and even 4:30. This provided a strong incentive to get the plant running. The production problems were soon ironed out, and volume deliveries began late that year. By this point, their workstation customers had already developed complete systems ready to use the 020 and the new floating point unit, the [[Motorola 68881]]. Systems were in the market only five or six months after the 020 had been announced.{{sfn|Oral|2007|p=32}}
 
===Replacement===
Design of the 020's follow-on began almost immediately. As part of their ongoing work with Hitachi, Motorola's fabrication system was finally catching up with the competition, as was their internal design workflow. This gave them considerably more room to work with, allowing the addition of larger [[processor cache]]s, a built-in [[memory management unit]] (MMU) and other features. The [[Motorola 68030]] was announced in September 1986,<ref>{{cite magazine |title=Motorla 68030 |magazine= Electronic Design |date=18 September 1986 |page=27}}</ref> with deliveries to begin the next summer. Due to the changes in the production lines, the new 030 would have a lower launch price than the 020.
 
There were significant differences between the 68000 and 020, especially due to the 32-bit memory interface. This required computer designs using it to be considerably different from earlier models. In contrast, there were few changes between the 020 and 030, the latter of which could be used as a drop-in replacement in many roles. For this reason, designs using the 030 appeared much more quickly after its release than the 020. The first [[Macintosh]] with the 020 was the [[Macintosh II]], released in March 1987, two years after the 020 had become widely available.<ref>{{cite magazine
| url = https://books.google.com/books?id=LWkn070OgWQC&q=appleworld+1987&pg=PA1
| title = Apple Debuts Two "Open" MacIntoshes, Is Developing a Mac Ethernet Interface With 3Com
| magazine = Local Area Networks Newsletter
| date = April 1987
| page = 1
| volume = 5
| issue = 4
}}</ref> with low-volume initial shipments starting two months later.<ref>{{cite news
| url = http://tech-insider.org/mac/research/1987/0507.html
| title = Apple Begins Shipments Of Macintosh II Computer
| date =8 May 1987
| newspaper = Wall Street Journal
}}</ref> Only eighteen months later, the [[Macintosh IIx]] replaced it, using the 030. Although it ran at the same 16&nbsp;MHz clock speed, the IIx offered 3.9&nbsp;MIPS compared to the II's 2.6.<ref>{{cite web |url=https://lowendmac.com/mac-ii-index/ |title= Mac II Index |website=Low End Mac}}</ref>
 
== Description ==
Line 40 ⟶ 87:
 
=== Multiprocessing features ===
Multiprocessing support is implemented externally by the use of aan RMC pin<ref>{{cite web| url=https://apps.dtic.mil/stidtic/tr/fulltext/pdfsu2/ADA245775a245775.pdf| title=Video-Text Processing By Using Motorola 68020 CPU And Its Environment |at=MC68020 Signal Description, Appendix A, p. 84| first=M. Kadri |last=Hekimoglu|date=March 1991 |access-date=20222020-01-06| archive-01url=https://web.archive.org/web/20200204214148/https://apps.dtic.mil/dtic/tr/fulltext/u2/a245775.pdf| url-status=live| archive-date=February 4, 2020}}</ref> to indicate an indivisible [[read-modify-write]] cycle in progress. All other processors have to hold off memory accesses until the cycle is complete.<ref>{{cite book | url = http://cache.freescale.com/files/32bit/doc/ref_manual/M68020UM.pdf | year = 1995 | title = MC68020/MC68EC020 Microprocessors User's Manual UM Rev. 1.0 | chapter = 5.3.3 Read-Modify-Write Cycle | publisher = Freescale Semiconductor }}</ref> Software support for multiprocessing includes the [[test-and-set|TAS]], [[compare-and-swap|CAS]] and [[double compare-and-swap|CAS2]] instructions.
 
In a multiprocessor system, coprocessors could not be shared between CPUs. To avoid problems with returns from coprocessor, bus error, and address error exceptions, it was generally necessary in a multiprocessor system for all CPUs to be the same model, and for all FPUs to be the same model as well.
Line 48 ⟶ 95:
 
The new addressing modes add [[Addressing mode#Scaled|scaled indexing]] and another level of [[Addressing mode#Memory indirect|indirection]] to many of the pre-existing modes.
 
While the 68000 had a 'supervisor mode', it did not meet the [[Popek and Goldberg virtualization requirements]] due to the single instruction 'MOVE from SR' being unprivileged but sensitive. Under the 68010 and later, this was made privileged, to better support virtualization software.
 
== Architecture ==
Line 181 ⟶ 226:
 
== Usage ==
The 68020 was used in the [[Apple Inc.|Apple]] [[Macintosh II]] and [[Macintosh LC]] [[personal computer]]s, [[Sun-3]] workstations, [[Amiga 1200]] (68EC020 variant), the [[Hewlett-Packard]] 8711 Series Network Analyzers, [[HP 9000]]/320, HP 9000/330, [[Apollo Computer]]'s [[Apollo/Domain|DN3000 and DN4000]] workstations,<ref>{{cite web|url=https://web-docs.gsi.de/~kraemer/COLLECTION/www.hunkler.com/aegis/aegis_sg.html|title=Survival Guide for Apollo Workstations|author=Tim Hunkler|date=July 1996|access-date=2022-10-13}}</ref> and the [[Alpha Microsystems]] AM-2000. The 68020 was an alternative upgrade to the [[Sinclair QL]]'s [[Motorola 68008|68008]] in the Super Gold Card interface by [[Miracle Systems]].
 
The [[Amiga 2500]] and A2500UX optionally shipped with the A2620 Accelerator using a 68020, 68881 FPU and 68851 MMU. The 2500UX shipped with [[Amiga Unix]], requiring an '020 or '030 processor.
Line 193 ⟶ 238:
== Variant ==
[[Image:KL Motorola MC68EC020.jpg|thumb|right|180px|Motorola MC68EC020]]
[[File:M68EC020.jpg|thumb|MC68EC020 in 20mm × 14mm QFP package]]
The '''68EC020''' is a lower cost version of the Motorola 68020. The main difference is that the 68EC020 only has a 24-bit address bus, rather than the 32-bit address bus of the full 68020, and thus is only able to address 16 MB of memory.
 
Line 240 ⟶ 286:
| Branch handling
| Branch prediction:
* Fixed branch prediction, branch-never-taken approach<ref>{{cite book | title = Guide to RISC Processors | url = https://archive.org/details/guidetoriscproce00dand_422 | url-access = limited | year = 2004 | author = Dandamudi, S. P. | page = [https://archive.org/details/guidetoriscproce00dand_422/page/n39 29] | publisher = Springer | isbn = 0-387-21017-2 }}</ref>
|-
| Transistors
Line 251 ⟶ 297:
== References ==
{{reflist|40em}}
 
===Bibliography===
* {{cite interview
|title=Oral History Panel on the Development and Promotion of the Motorola 68000
|url=https://archive.computerhistory.org/resources/access/text/2012/04/102658164-05-01-acc.pdf
|date=23 July 2007
|interviewer=Dave House
|ref=CITEREFOral2007
}}
 
 
== External links ==