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{{Short description|Series of computer microprocessors developed by Jiāngnán Computing Lab}}
{{cleanup|date=October 2011}}
{{Other uses|Sunway (disambiguation){{!}}Sunway}}
{{More footnotes|date=October 2011}}
'''Sunway''', or '''ShenWei''', ({{zh|s=申威}}), is a series of computer [[microprocessor]]s, developed by Jiangnan Computing Lab ({{lang|zh|江南计算技术研究所}}) in [[Wuxi]], [[China]].<ref name="chinamoneynetwork">{{cite news |last1=Wu |first1=Yimian |title=China Supports Local Semiconductor Firms By Adding Them To Government Procurement List |url=https://www.chinamoneynetwork.com/2018/05/23/china-supports-local-semiconductor-firms-by-adding-them-to-government-procurement-list |access-date=31 May 2018 |publisher=China Money Network |date=23 May 2018}}</ref> It uses a [[reduced instruction set computer]] (RISC) architecture, but details are still sparse.


== History ==
'''ShenWei''' ([[Chinese language|Chinese]]:{{lang|zh|申威}}), also known as '''Sunway''', is a series of [[microprocessor]]s developed by [[Jiāngnán Computing Lab]] ({{lang|zh|江南计算技术研究所}}) in [[Wuxi]], [[China]].
⚫
The Sunway series microprocessors were developed mainly for the use of the military of the People's Republic of [[China]]. It is expressed on online forums that the original [[microarchitecture]]<!--the word used, but do not understand rest that is in Chinese--> is believed to be inspired by the [[DEC Alpha]].<ref name="gen123">{{cite web |url=http://bbs.lemote.com/archiver/?tid-22869-page-1.html |title=Jiangnan Computing Lab's Civilian CPU Debut - SW-1 |access-date=2011-10-31 |author=hswz |date=2009-05-04 |work=bbs.lemote.com}}</ref>{{better source|date=March 2018}} The SW-3 is thought especially to be based on the [[Alpha 21164]].<ref>{{cite web|url=http://laotsao.wordpress.com/2011/10/29/sw1600-and-alpha-21164/ |title=SW1600 and Alpha 21164|access-date=2011-10-29 |author=Hung-Sheng Tsao |date=2011-10-29 |work=LaoTsao's Weblog}}</ref>


[[Jack Dongarra]] states about the follow-on [[SW26010]], the "ShenWei-64 Instruction Set (this is NOT related to the DEC Alpha [[instruction set]])", and doesn't say it's a new instruction set from the three prior generations he names;<ref name=dongarra2016>{{Cite web|url=http://www.netlib.org/utk/people/JackDongarra/PAPERS/sunway-report-2016.pdf|title=Report on the Sunway TaihuLight System|last=Dongarra|first=Jack|date=2016-06-20|website=www.netlib.org|access-date=2016-06-20}}</ref><ref name="next-platform">{{cite news|last1=Hemsoth|first1=Nicole|title=A Look Inside China's Chart-Topping New Supercomputer|url=http://www.nextplatform.com/2016/06/20/look-inside-chinas-chart-topping-new-supercomputer/|access-date=4 July 2016|publisher=The Next Platform|date=20 June 2016}}</ref> although precise details of the instruction set are unknown.
== ShenWei SW1600 microprocessor ==
ShenWei SW1600, aka SW-3, is the third generation CPU by Jiāngnán Computing Research Lab. Operating at 1.1&nbsp;GHz, it achieves 140 [[FLOPS|GFLOPS]] floating point performance from its 16 cores RISC architecture. The CPU is a national key collaborative laboratory project by Jiāngnán Computing Research Lab and High Performance Server & Storage Technologies. The People's Republic of China asserts its sole intellectual property rights. A little more information about the 65&nbsp;nm ShenWei SW-3 [[Multi-core processor|multi-core CPU]] project can be found on official web site of High Performance Services & Storage Technologies - national key research laboratory.
Some characteristics of the SW1600 core explained:
⚫
* Four-issue [[superscalar]]
⚫
* Two integer and two floating-point execution units
⚫
* 7-stage integer pipeline and 10-stage floating-point pipeline
⚫
* 43-bit virtual address and 40-bit physical address
⚫
* Up to 8&nbsp;TB virtual memory and 1&nbsp;TB of physical memory supported
⚫
* L1 cache: 8&nbsp;KB instruction cache and 8&nbsp;KB data cache
* L2 cache: 96&nbsp;KB
⚫
* 128-bit system bus
With the published information, similarity with [[Alpha 21164]]A is suggested.<ref>{{cite web|url=http://laotsao.wordpress.com/2011/10/29/sw1600-and-alpha-21164/ |title=SW1600 and Alpha 21164|accessdate=2011-10-29 |author=Hung-Sheng Tsao |date=2011-10-29 |work=LaoTsao's Weblog }}</ref>{{rs|date= January 2014|failed}}

== History of ShenWei processors ==
⚫
The ShenWei series of microprocessors was developed primarily for the use of the military of the [[People's Republic of China]]. The original microarchitecture is believed to be inspired by [[DEC Alpha]].<ref name="gen123">{{cite web |url=http://bbs.lemote.com/archiver/?tid-22869-page-1.html |title=Jiangnan Computing Lab's Civilian CPU Debut - SW-1 |accessdate=2011-10-31 |author=hswz |date=2009-05-04 |work=bbs.lemote.com }}</ref>{{rs|date= January 2014|failed}}


=== ShenWei SW-1 ===
=== Sunway SW-1 ===
* First generation, 2006
* First generation, 2006
* Single-core
* Single-core
* 900&nbsp;MHz
* 900&nbsp;MHz


=== ShenWei SW-2 ===
=== Sunway SW-2 ===
* Second generation, 2008
* Second generation, 2008
* Dual-core
* Dual-core
* 1400&nbsp;MHz
* 1400&nbsp;MHz
* SMIC 130&nbsp;nm process
* SMIC 130&nbsp;nm process
* 70–100&nbsp;W
* 70–100 W


=== ShenWei SW-3 ===
=== Sunway SW-3, SW1600 ===
* Third generation, 2010
* Third generation, 2010
* 16-core, 64-bit RISC<ref name="vrzone">{{cite web|last1=Novakovic|first1=Nebojsa|title=Chinese high end CPUs are now in the game – details: Part 2, Alpha|url=http://vr-zone.com/articles/chinese-high-end-cpus-are-now-in-the-game-details-part-2-alpha/14347.html|website=VR-Zone|access-date=2016-06-22|date=2011-12-26}}</ref>
⚫
* 16-core, 64-bit RISC
* 975–1200&nbsp;MHz
* 975–1200&nbsp;MHz<ref name="vrzone" />
* 65&nbsp;nm process
* 65&nbsp;nm process
* 140.8 GFLOPS @ 1.1&nbsp;GHz
* 140.8 GFLOPS @ 1.1&nbsp;GHz
Line 41: Line 29:
* Peak memory bandwidth: 68&nbsp;GB/s
* Peak memory bandwidth: 68&nbsp;GB/s
* Quad-channel 128-bit DDR3
* Quad-channel 128-bit DDR3
⚫
* Four-issue [[superscalar]]
⚫
* Two integer and two floating-point execution units
⚫
* 7-stage integer pipeline and 10-stage floating-point pipeline
⚫
* 43-bit virtual address and 40-bit physical address
⚫
* Up to 8 TB virtual memory and 1&nbsp;TB of physical memory supported
⚫
* L1 cache: 8 KB instruction cache and 8&nbsp;KB data cache<ref name="vrzone" />
* L2 cache: 96 KB<ref name="vrzone" />
⚫
* 128-bit system bus


== See also ==
=== Sunway SW26010 ===
{{See also|SW26010}}
⚫
* [[Sunway BlueLight]]
* Fourth generation, 2016
⚫
* [[Sunway TaihuLight]]
⚫
* 64-bit RISC processor
* [[SW26010]]
* [[Manycore processor|Manycore]] architecture, with 4 CPU clusters on a chip, each comprising 64 lightweight compute CPUs with an additional management CPU, linked by a [[network-on-a-chip]]<ref>{{Cite journal| last1 = Fu| first1 = Haohuan| last2 = Liao| first2 = Junfeng| last3 = Yang| first3 = Jinzhe| last4 = Wang| first4 = Lanning| last5 = Song| first5 = Zhenya| last6 = Huang| first6 = Xiaomeng| last7 = Yang| first7 = Chao| last8 = Xue| first8 = Wei| last9 = Liu| first9 = Fangfang| last10 = Qiao| first10 = Fangli| last11 = Zhao| first11 = Wei| last12 = Yin| first12 = Xunqiang| last13 = Hou| first13 = Chaofeng| last14 = Zhang| first14 = Chenglong| last15 = Ge| first15 = Wei| last16 = Zhang| first16 = Jian| last17 = Wang| first17 = Yangang| last18 = Zhou| first18 = Chunbo| last19 = Yang| first19 = Guangwen|date=2016|title=The Sunway TaihuLight Supercomputer: System and Applications|journal=Sci. China Inf. Sci.| volume = 59| issue = 7|doi=10.1007/s11432-016-5588-7| doi-access = | s2cid = 14751921}}</ref>

==See also==
⚫
*[[Sunway BlueLight]]
⚫
*[[Sunway TaihuLight]]
*[[Alpha_21164|DEC Alpha 21164]]
*[[Loongson]] – a family of Chinese [[MIPS architecture|MIPS]] processors
*[[Supercomputing in China]]


== References ==
== References ==
{{Reflist}}
<references />


{{RISC-based processor architectures}}
{{RISC-based processor architectures}}

[[Category:Instruction set architectures]]
{{Authority control}}
⚫
[[Category:Microprocessors]]

⚫
[[Category:Microprocessors made in China]]
[[Category:Science and technology in China]]
[[Category:Science and technology in China]]
[[Category:ShenWei microprocessors|*]]
[[Category:Sunway microprocessors|*]]
[[Category:Supercomputing in China]]
[[Category:Supercomputing in China]]
[[Category:32-bit microprocessors]]
[[Category:64-bit microprocessors]]

Latest revision as of 08:15, 14 February 2024

For other uses, see Sunway.

Sunway, or ShenWei, (Chinese: 申威), is a series of computer microprocessors, developed by Jiangnan Computing Lab (江南计算技术研究所) in Wuxi, China.[1] It uses a reduced instruction set computer (RISC) architecture, but details are still sparse.

History

[edit]

The Sunway series microprocessors were developed mainly for the use of the military of the People's Republic of China. It is expressed on online forums that the original microarchitecture is believed to be inspired by the DEC Alpha.[2][better source needed] The SW-3 is thought especially to be based on the Alpha 21164.[3]

Jack Dongarra states about the follow-on SW26010, the "ShenWei-64 Instruction Set (this is NOT related to the DEC Alpha instruction set)", and doesn't say it's a new instruction set from the three prior generations he names;[4][5] although precise details of the instruction set are unknown.

Sunway SW-1

[edit]
  • First generation, 2006
  • Single-core
  • 900 MHz

Sunway SW-2

[edit]
  • Second generation, 2008
  • Dual-core
  • 1400 MHz
  • SMIC 130 nm process
  • 70–100 W

Sunway SW-3, SW1600

[edit]
  • Third generation, 2010
  • 16-core, 64-bit RISC[6]
  • 975–1200 MHz[6]
  • 65 nm process
  • 140.8 GFLOPS @ 1.1 GHz
  • Max memory capacity: 16 GB
  • Peak memory bandwidth: 68 GB/s
  • Quad-channel 128-bit DDR3
  • Four-issue superscalar
  • Two integer and two floating-point execution units
  • 7-stage integer pipeline and 10-stage floating-point pipeline
  • 43-bit virtual address and 40-bit physical address
  • Up to 8 TB virtual memory and 1 TB of physical memory supported
  • L1 cache: 8 KB instruction cache and 8 KB data cache[6]
  • L2 cache: 96 KB[6]
  • 128-bit system bus

Sunway SW26010

[edit]
See also: SW26010
  • Fourth generation, 2016
  • 64-bit RISC processor
  • Manycore architecture, with 4 CPU clusters on a chip, each comprising 64 lightweight compute CPUs with an additional management CPU, linked by a network-on-a-chip[7]

See also

[edit]

References

[edit]
  1. ^ Wu, Yimian (23 May 2018). "China Supports Local Semiconductor Firms By Adding Them To Government Procurement List". China Money Network. Retrieved 31 May 2018.
  2. ^ hswz (2009-05-04). "Jiangnan Computing Lab's Civilian CPU Debut - SW-1". bbs.lemote.com. Retrieved 2011-10-31.
  3. ^ Hung-Sheng Tsao (2011-10-29). "SW1600 and Alpha 21164". LaoTsao's Weblog. Retrieved 2011-10-29.
  4. ^ Dongarra, Jack (2016-06-20). "Report on the Sunway TaihuLight System" (PDF). www.netlib.org. Retrieved 2016-06-20.
  5. ^ Hemsoth, Nicole (20 June 2016). "A Look Inside China's Chart-Topping New Supercomputer". The Next Platform. Retrieved 4 July 2016.
  6. ^ a b c d Novakovic, Nebojsa (2011-12-26). "Chinese high end CPUs are now in the game – details: Part 2, Alpha". VR-Zone. Retrieved 2016-06-22.
  7. ^ Fu, Haohuan; Liao, Junfeng; Yang, Jinzhe; Wang, Lanning; Song, Zhenya; Huang, Xiaomeng; Yang, Chao; Xue, Wei; Liu, Fangfang; Qiao, Fangli; Zhao, Wei; Yin, Xunqiang; Hou, Chaofeng; Zhang, Chenglong; Ge, Wei; Zhang, Jian; Wang, Yangang; Zhou, Chunbo; Yang, Guangwen (2016). "The Sunway TaihuLight Supercomputer: System and Applications". Sci. China Inf. Sci. 59 (7). doi:10.1007/s11432-016-5588-7. S2CID 14751921.
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