Clock recovery

Some digital data streams, especially high-speed serial data streams (such as the raw stream of data from the magnetic head of a disk drive) are sent without an accompanying clock. The receiver generates a clock from an approximate frequency reference, and then phase-aligns to the transitions in the data stream with a phase-locked loop (PLL). This process is commonly known as clock and data recovery (CDR).

In order for this scheme to work, a data stream must transition frequently enough to correct for any drift in the PLL's oscillator. The limit for how long a clock recovery unit can operate without a transition is known as its maximum consecutive identical digits (CID) specification. To ensure frequent transitions, some sort of encoding is used; 8B/10B encoding is very common, while Manchester encoding serves the same purpose in old revisions of 802.3 local area networks.

See also

• Phase-locked loop
• 8B/10B encoding
• Eight-to-Fourteen Modulation
• Manchester code
• 64B/66B encoding
• B8ZS encoding
• HDB3 encoding

Template:Electro-stub Template:Engr-stub