RN0225

Release Notes
CoreUSXGMII v2.1
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51300225.2 9/20
Revision History

1 Revision History

The revision history describes the changes that were implemented in the document. The changes are
listed by revision, starting with the most current publication.

1.1 Revision 2.0

Added PolarFire® SoC support.

1.2 Revision 1.0

This is the first publication of this document. Created for CoreUSXGMII v2.0.

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Inhalt

1 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 Revision 2.0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Revision 1.0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 CoreUSXGMII v2.1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.3 Delivery Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.4 Supported Families . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.5 Supported Tool Flows . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.6 Installation Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.7 Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.8 Supported Test Environments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.9 Release History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.10 Resolved Issues in the v2.1 Release . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.11 Discontinued Features and Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.12 Known Limitations and Workarounds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

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Tables

Table 1 Release History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

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CoreUSXGMII v2.1

2 CoreUSXGMII v2.1

2.1 Overview
These release notes accompany the production release of CoreUSXGMII v2.1. This document provides
details about the features, enhancements, system requirements, supported families, implementations,
and known issues and workarounds.

2.2 Features
CoreUSXGMII (Universal Serial Media Independent Interface) IP is used to carry single network port
over a single SERDES between the MAC and PHY for Multi-Gigabit technology at 1G/ 2.5G/ 5G/ 10G
data rate.
CoreUSXGMII has following features:
• Convey Single network ports over an USXGMII MAC-PHY interface (USXGMII-S Only - USXGMII-
Copper PHY: EDCS- 1150953)
• Supports operating speed rates of 1G/2.5G/5G/10G
• MAC side interface is 64-bit XGMII
• Support for MAC side interface for 1G is 8-bit GMII interface and will be added in future release
• System interface operates in full duplex mode only
• Provides a serial 10.3125Gbps serial link on the transceiver side
• Provides 64-bit interface to Microsemi Transceiver operating in PCS 64B66B Clause 49
• Supports Clause 37 Auto-negotiation between MAC and PHY
• APB management interface for configuration/status

2.3 Delivery Types

CoreUSXGMII is available in two versions: Evaluation and Obfuscated. Obfuscated is licensed and
Evaluation is free with Libero SoC.
• Evaluation: The Evaluation version is freely available and supports four hours of functionality on
silicon.
• Obfuscated: Complete RTL code is provided for the core, enabling the core to be instantiated with
SmartDesign. Simulation, Synthesis, and Layout can be performed with Libero software. The RTL
code for the core is obfuscated using the IP encryption (encryptP1735.pl) solution.

2.4 Supported Families

• PolarFire® SoC
• PolarFire®

2.5 Supported Tool Flows

CoreUSXGMII requires Libero v12.0 or higher.

2.6 Installation Instructions

The CoreUSXGMII CPZ file must be installed into Libero software. This is done automatically through the
Catalog update function in Libero, or the CPZ file can be manually added using the Add Core catalog
feature. Once the CPZ file is installed in Libero, the core can be configured, generated, and instantiated
within SmartDesign for inclusion in the Libero project. For more information, see the Knowledge Based
article.
To know how to create SmartDesign project using the IP cores, refer to Libero SoC documents page and
use the latest SmartDesign user guide.

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CoreUSXGMII v2.1

2.7 Documentation
This release contains a copy of the CoreUSXGMII Handbook. The handbook, describes the core
functionality and gives step-by-step instructions on how to simulate, synthesize, and place-and-route this
core, and also implementation suggestions. Refer to Libero SoC documents page for instructions on
obtaining IP documentation.
For updates and additional information, visit the Intellectual Property pages on the Microsemi SoC
Products Group website:
http://www.microsemi.com/products/fpga-soc/design-resources/ip-cores.

2.8 Supported Test Environments

User testbench is not provided with the core.

2.9 Release History

Table 1 lists the release history.

Table 1 • Release History

Version Date Changes

2.1 September 2020 Added PolarFire SoC support.
2.0 September 2019 Initial release.

2.10 Resolved Issues in the v2.1 Release

There were no software action requests (SARs) resolved. PolarFire SoC support is added.

2.11 Discontinued Features and Devices

There are no discontinued features and devices.

2.12 Known Limitations and Workarounds

This release of the IP does not provide User Test bench.

Microsemi Proprietary and Confidential RN0225 Release Notes Revision 2.0 7